H. Ando, T. Morie, M. Miyake, M. Nagata and A. Iwata
Image Segmentation/Extraction Using Nonlinear Cellular Networks
and their VLSI Implementation Using Pulse-Modulation Techniques
IEICE Trans. Fundamentals, Vol. E85-A, No. 2, pp. 381-388, 2002.
T. Morie and T. Matsuura and M. Nagata and A. Iwata
A Multi-Nano-Dot Circuit and Structure Using Thermal-Noise Assisted Tunneling for Stochastic Associative Processing
J. Nanosci. Nanotech., Vol. 2, No. 3, pp. 343-349, June, 2002.
K. Katayama, M. Nagata, T. Morie and A. Iwata
An Hadamard Transform Chip Using the PWM Circuit Technique and Its Application to Image Processing
IEICE Trans. Electron., Vol. E85-C, No. 8, pp. 1596-1603, Aug. 2002.
M. Nagata, Y. Murasaka, Y. Nishimori, T. Morie, and A. Iwata
Substrate Noise Analysis with Compact Digital Noise Injection and Substrate Models
Proc. 7th Asia and South Pacific Design Automation Conf, pp. 71-76, Bangalore,
Jan. 2002.
T. Morie, J. Umezawa, T. Nakano, H. Ando, M. Nagata, and A. Iwata
A Biologically-Inspired Object Recognition System Using Pixel-Parallel Feature Extraction VLSIs
International Invitational Workshop on Intelligent Interface Devices,
pp. 35-37, Kitakyushu, March 14, 2002.
M. Nagata, T. Morie, and A. Iwata
Modeling Substrate Noise Generation in CMOS Digital Integrated Circuits
IEEE 2002 Custom Integrated Circuit Conf, Orlando, May 2002.
T. Morie, T. Matsuura, M. Nagata, and A. Iwata
A Multi-Nanodot Floating-Gate MOSFET Circuit for Spiking Neuron Models
2002 IEEE Silicon Nanoelectronics Workshop, pp.53-54, Honolulu, June 9, 2002.
T. Morie, T. Matsuura, M. Nagata, and A. Iwata
An Efficient Clustering Algorithm Using Stochastic Association Model and Its Implementation Using Nanostructures
Advances in Neural Information Processing Systems 14,
Ed. T. G. Dietterich, S. Becker and Z. Ghahramani,
MIT Press, Cambridge, MA, 2002.
NIPS Online
K. Katayama and A. Iwata
A High-Resolution Hadamard Transform Chip
International Conference on Solid State Devices and Materials (SSDM), pp. 372-373, Nagoya, September17-19, 2002
T. Maeda, A. Iwata, M. Kawabata, and S. Orisaka
A 10-GHz Bipolar VCO with Reduced Phase Noise
International Conference on Solid State Devices and Materials (SSDM), pp. 370-371, Nagoya, September17-19, 2002
H. Ando, T. Morie, M. Nagata, and A. Iwata
An Image Region Extraction LSI Based on a Merged/Mixed-Signal Nonlinear Oscillator Network Circuit
28th European Solid-State Circuits Conference (ESSCIRC 2002), CP.11, pp. 703-706, Florence, Italy, Sept. 26, 2002
K. Katayama and A. Iwata
Pulse Coupled Neural Network using Coupled Phase Locked Loop
International Symposium on Nonlinear Theory and its Applications (NOLTA), pp. 853-856, Xi'an,October 7-11, 2002